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Support to F407ZET6 with PIO

Posted: Tue Feb 14, 2023 8:55 pm
by tpcorrea
Hello everybody!

I have developed a custom board with the F407ZET6 processor and now I am trying to write some FW to it using platformio and STM32duino. Well, first of all, this processor has not a generic board, so I have created the genericSTM32F407ZET6.json file (based on genericSTM32F407VE).

Now I can compile the project with the correct processor, but I am still not getting how the variant_generic.h works. If a look this file at the framework-arduinoststm32\variants\STM32F4xx\F407Z(E-G)T_F417Z(E-G)T, the pin assignment doesn't seems to match the processors; as an example, the .h has a

#define PB2 18

But if I look the device datasheet, PB2 is on pin 48.

So, is the variant_generic.h wrong or my understanding??? :oops:

Re: Support to F407ZET6 with PIO

Posted: Tue Feb 14, 2023 9:34 pm
by GonzoG
Those numbers are not physical pin number on a chip. They are just numbered in sequence.
PA0 = 0,.., PA15=15, PB0 = 16, PB1=17, PB2=18...

Re: Support to F407ZET6 with PIO

Posted: Tue Feb 14, 2023 9:57 pm
by tpcorrea
Ok. Thanks for the reply. So where is the physical pin assignment done? Do I need to take care of this or it should work with my (custom) board?

Re: Support to F407ZET6 with PIO

Posted: Wed Feb 15, 2023 12:20 am
by GonzoG
I think it's done in variant_*.h and .cpp and PeripheralPins.c

But there is a generic F407ZE.