STM32L476RG

STM32F103 Nucleo boards e.g. STM Nucleo F103RB
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adrien3d
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Joined: Thu Nov 24, 2016 4:47 am

STM32L476RG

Post by adrien3d » Thu Nov 24, 2016 5:05 am

Hi,

I have purchased a Nucleo-L476RG, and I've tried to unzip https://github.com/GrumpyOldPizza/arduino-STM32L4 and https://github.com/stm32duino/Arduino_Core_STM32L4 in the hardware folder in my Arduino folder.
I am on MacOS 10.12.1 and Arduino 1.6.13, but, I can't see anything on the board section.

Do you have any idea on how to fix this ?

Thanks

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RogerClark
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Re: STM32L476RG

Post by RogerClark » Thu Nov 24, 2016 7:04 am

Didnt you just post this somewhere else, as I have already replied to this question

Please do not cross post.

Also as this is @grumpyoldpizza's core you may need to PM him about it, as its not something that I manage

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GrumpyOldPizza
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Location: Denver, CO

Re: STM32L476RG

Post by GrumpyOldPizza » Thu Nov 24, 2016 12:40 pm

RogerClark wrote:Didnt you just post this somewhere else, as I have already replied to this question

Please do not cross post.

Also as this is @grumpyoldpizza's core you may need to PM him about it, as its not something that I manage
Create a ~/Arduino/hardware/grumpyoldpizza/STM32L4 and put all the files from github in there. Also install the SAMD core to pull in the compiler and such.

There is an official json file where all of this is automated, but because we are in the middle of adding STM32L432 and STM32L433 (yes, NUCLEO-L432 is supported as well), so the code is in flux.

MasterT
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Joined: Wed Mar 08, 2017 4:17 am

Re: STM32L476RG

Post by MasterT » Fri Mar 24, 2017 8:49 pm

I can't figure out correct name of the dma interrupt subroutine, so far
void DMA1_Channel1_Handler(void)
void DMA1_Channel1_IRQnHandler(void)
void HAL_DMA_IRQHandler(void)
nether works. I set up dma in conjunction with adc, and I know it is working in "manual" mode till half transfer interrupt has to be called, after that nucleo hangs up.
DMA settings:

Code: Select all

void Configure_DMA(void)
{
  NVIC_SetPriority(DMA1_Channel1_IRQn, 1); /* DMA IRQ lower priority than ADC IRQ */
  NVIC_EnableIRQ(DMA1_Channel1_IRQn);

  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
  LL_DMA_ConfigTransfer(DMA1,
                        LL_DMA_CHANNEL_1,
                        LL_DMA_DIRECTION_PERIPH_TO_MEMORY |
                        LL_DMA_MODE_CIRCULAR              |
                        LL_DMA_PERIPH_NOINCREMENT         |
                        LL_DMA_MEMORY_INCREMENT           |
                        LL_DMA_PDATAALIGN_HALFWORD        |
                        LL_DMA_MDATAALIGN_HALFWORD        |
                        LL_DMA_PRIORITY_HIGH               );  
  /* Select ADC as DMA transfer request */
  LL_DMA_SetPeriphRequest(DMA1, 
                          LL_DMA_CHANNEL_1,
                          LL_DMA_REQUEST_0);
  /* Set DMA transfer addresses of source and destination */
  LL_DMA_ConfigAddresses(DMA1,
                         LL_DMA_CHANNEL_1,
                         LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),
                         (uint32_t)&aADCxConvertedData,
                         LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
  /* Set DMA transfer size */
  LL_DMA_SetDataLength(DMA1,
                       LL_DMA_CHANNEL_1,
                       ADC_CONVERTED_DATA_BUFFER_SIZE);
  /* Enable DMA transfer interruption: transfer complete */
  LL_DMA_EnableIT_TC(DMA1,
                     LL_DMA_CHANNEL_1);
  /* Enable DMA transfer interruption: half transfer */
  LL_DMA_EnableIT_HT(DMA1,
                     LL_DMA_CHANNEL_1);
  /* Enable DMA transfer interruption: transfer error */
  LL_DMA_EnableIT_TE(DMA1,
                     LL_DMA_CHANNEL_1);
  LL_DMA_EnableChannel(DMA1,
                       LL_DMA_CHANNEL_1);
}
I can see that correct bits is set for TE TH TC and EN in "DMA channel x configuration register (DMA_CCRx)", and samples transferred one by one if I set adc in single conversion mode. After half buffer is filled board doesn't respond, my understanding there was no interrupt clearing procedure, so it's stuck.

Code: Select all

void DMA1_Channel1_IRQnHandler(void)
{  
//  (*(uint32_t*)0x40020004) &= ~(0x0FFFFFFFU);
  (*(uint32_t*)0x40020004) = (0x0FFFFFFFU);

  /* Check whether DMA transfer complete caused the DMA interruption */
  if(LL_DMA_IsActiveFlag_TC1(DMA1) == 1)
  {
    /* Clear flag DMA transfer complete */
    LL_DMA_ClearFlag_TC1(DMA1);    
    /* Call interruption treatment function */
    AdcDmaTransferComplete_Callback();
  }
  /* Check whether DMA half transfer caused the DMA interruption */
  if(LL_DMA_IsActiveFlag_HT1(DMA1) == 1)
  {
    /* Clear flag DMA half transfer */
    LL_DMA_ClearFlag_HT1(DMA1); 
    /* Call interruption treatment function */
    AdcDmaTransferHalf_Callback();
  }
  
  /* Check whether DMA transfer error caused the DMA interruption */
  if(LL_DMA_IsActiveFlag_TE1(DMA1) == 1)
  {
    /* Clear flag DMA transfer error */
    LL_DMA_ClearFlag_TE1(DMA1);
    /* Call interruption treatment function */
    AdcDmaTransferError_Callback();
  }
}

Is there some kind of driver, or it's not implemented yet?

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GrumpyOldPizza
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Location: Denver, CO

Re: STM32L476RG

Post by GrumpyOldPizza » Fri Mar 31, 2017 8:54 pm

Is there some kind of driver, or it's not implemented yet?
This should be one in the next few weeks for the STM32L4 core. Time-triggered ADC, which is what you seem to be after ?

MasterT
Posts: 12
Joined: Wed Mar 08, 2017 4:17 am

Re: STM32L476RG

Post by MasterT » Fri Mar 31, 2017 11:34 pm

GrumpyOldPizza wrote:
Is there some kind of driver, or it's not implemented yet?
This should be one in the next few weeks for the STM32L4 core. Time-triggered ADC, which is what you seem to be after ?
Not exactly, time triggered ADC is simple part, and I may switch ADC in free-running after all. What is not clear, is how to get call back function from DMA, half complete and complete interrupt. To copy data from input buffer for next stage, I need two interrupts.

gncemre23
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Joined: Wed May 31, 2017 10:20 pm

Re: STM32L476RG

Post by gncemre23 » Wed May 31, 2017 10:30 pm

I'm a new user of Nucleo STM32l476RG. I'm wondering what the purposes of tools->DOSFS menu in arduino ide is. Can we use for this menu for data logging with SDIO mode?

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GrumpyOldPizza
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Location: Denver, CO

Re: STM32L476RG

Post by GrumpyOldPizza » Wed Jun 07, 2017 5:45 pm

gncemre23 wrote:I'm a new user of Nucleo STM32l476RG. I'm wondering what the purposes of tools->DOSFS menu in arduino ide is. Can we use for this menu for data logging with SDIO mode?
The STM32L4 core as a filesystem called DOSFS (which among other things allows stream writes, an a power safe mode). It does support SDCARD via SPI and SDIO, as well a Serial NOR flashes via QSPI (SPI mode coming; ah, yes, a NOR FTL is used there). With this option you are configuring which of the various devices is attached to DOSFS. As of right now you can only select one. Internally an early initialization is needed so that USB/MSC also can access the same storage device, as well as taking some exclusive pins out of the user accessible definitions in variant.cpp.

So yes, you can use that for data logging via SDIO. We have seen 21MB/sec read and 18 MB/sec write performance throu the filesystem with that. There are a bunch of different options for opening/creating a file in DOSFS that trades off speed vs. power.

gncemre23
Posts: 2
Joined: Wed May 31, 2017 10:20 pm

Re: STM32L476RG

Post by gncemre23 » Sun Jun 11, 2017 6:42 am

GrumpyOldPizza wrote:
gncemre23 wrote:I'm a new user of Nucleo STM32l476RG. I'm wondering what the purposes of tools->DOSFS menu in arduino ide is. Can we use for this menu for data logging with SDIO mode?
The STM32L4 core as a filesystem called DOSFS (which among other things allows stream writes, an a power safe mode). It does support SDCARD via SPI and SDIO, as well a Serial NOR flashes via QSPI (SPI mode coming; ah, yes, a NOR FTL is used there). With this option you are configuring which of the various devices is attached to DOSFS. As of right now you can only select one. Internally an early initialization is needed so that USB/MSC also can access the same storage device, as well as taking some exclusive pins out of the user accessible definitions in variant.cpp.

So yes, you can use that for data logging via SDIO. We have seen 21MB/sec read and 18 MB/sec write performance throu the filesystem with that. There are a bunch of different options for opening/creating a file in DOSFS that trades off speed vs. power.
I really appreciate your all work. Programming the Nucleo Boards like programming arduino is a very good idea and very useful. However, it wiil be better if some documents are exist about editing the variant.cpp or documents which explains how the SDIO mode is used.
Best Regards

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