To change Pin tasks

[mebab]

Maybe the following question looks like a very basic hardware issue but I would need your comments to ensure:
Question:
Is it possible to swap pin a task for instance from MISO to MOSI in STM32 via the relevant variant (.cpp file)?
As I see in Cube MX IDE, every pin can only be designated for a few specific tasks. For example, PA6 in STM32L433 can be SPI1_MISO and some other tasks where PA7 can be SPI1_MOSI. Is it possible to change these tasks? I mean PA6 to be SPI1_MOSI and PA7 to be SPI1_MISO via the library?
Is it possible to change what Cube MX IDE represents for each pin or it is the hardware that dictates the possible task selections for each Pin?

Thanks in advance,

[mrburnette]

STM32F103 Internals.jpg (91.17 KiB) Viewed 1085 times

The STM32F103xx has a matrix internal connection (actually several different buses), flexible but not every internal connection to any external connection. The STM32Arduino core respects the internal matrix. The reference manual RM0008 is the authority.

2.2.1 System Architecture consists of Buses, and General purpose DMA (Direct Memory
Access), Internal SRAM, Internal Flash Memory which some of them consider as masters
and others consider as slaves.

There are four master parts and three slave parts in the architecture which are mentioned
below.

Masters:
I-bus (Cortex-M3 ICode bus): It connects the Cortex M3 core to the Flash memory
instruction in order to do prefeching.
D-bus (DCode bus): It connects the Cortex-M3 core to the Flash memory Data interface.
S-bus (System bus): It connects the Cortex-M3 core peripheral bus to a BoxMatrix in order to
control the arbitration between the DMA and Core.
GP-DMA bus (General Purpose DMA): It connects CPU(Central Processing Unit) and DMA
to the Flash memory, SRAM and Peripherals through BoxMatrix in order to make
communication between them.

Slaves:
Internal SRAM
Internal Flash Memory
AHB (Advanced High Performance Bus) to APB (Advanced Peripheral Bus) bridge: This
bridge divides AHP bus into two buses, APB1 and APB2. APB1 is for peripheral which their
frequency is 36 MHz and APB2 is for peripherals which they operate with 72 MHz
frequency.

This PDF does a fair job at covering the internal workings:

http://www.emcu.it/InsideCORTEX-1221142709.pdf