Guide for under- and over-clocking the blue-pill needed

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stevestrong
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Guide for under- and over-clocking the blue-pill needed

Postby stevestrong » Sun Jan 08, 2017 10:32 am

Dear experts,

I would need a step-by-step guide for over- and under-clocking.
Although I have found here and here some relevant info, but it is only partial, I don't have a complete picture about:
- where to change CPU clock? Are flash wait-states involved in final CPU operating speed? How?
- where to change peripheral (SPI, GPIO?) clock? Is it related to changing CPU clock? How?
- can I decrease flash wait-states (to zero maybe) if I under-clock to 48MHz?
- under which circumstances (which CPU/peripheral clock combinations) is USB still working?

Example:
- would it be possible to underclock to 48MHz, decrease flash-wait states (to zero?), set SPI to 24/48 MHz ?

I would greatly appreciate if someone could collect and post this (and more?) info here and/or on wiki.
Last edited by stevestrong on Sun Jan 08, 2017 11:46 am, edited 5 times in total.

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RogerClark
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Re: Guide for under- and over-clocking the blue-pill needed

Postby RogerClark » Sun Jan 08, 2017 10:42 am

@stevestrong,

See my other post to your question.

USB will only for for 72Mhz and 48Mhz (and you need to change the USB divider)

See the GD32 for how to set the CPU frequency and still have the tick etc work OK (I think the tick code should actually be fine now as I made it dependent on F_CPU months ago)

SPI etc are a different matter, as they are just divisions of the main clock freq.

Wait states... Depends on how hard you want to push it. But I don't think its guaranteed to work with less wait states than it already uses on 72MHz

stevestrong
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Re: Guide for under- and over-clocking the blue-pill needed

Postby stevestrong » Sun Jan 08, 2017 11:13 am

OK, here it is what I have found out so far:

CPU PLL frequency is set up in "/variants/[your_board]/wirish/boards_setup.cpp".
For BP it is https://github.com/rogerclarkmelbourne/ ... _setup.cpp.

Btw, I think there is a bug in line 74: the divider for USB at 48MHz main clock should be RCC_USB_SYSCLK_DIV_1, right?

The value of F_CPU is set in platform.txt, as build parameter

Code: Select all

build.f_cpu=72000000L

This however can be overridden in boards.txt, see for example here.

So for BP to run at 48MHz, an additional line can be added in boards.txt:

Code: Select all

genericSTM32F103C.build.f_cpu=48000000L

This would be fixed and then used for any further project.
However, if one need to change the CPU frequency often, then the following lines would make the selection more flexible over the IDE menu:

Code: Select all

genericSTM32F103C.menu.cpu_speed.speed_72mhz=72Mhz (standard)
genericSTM32F103C.menu.cpu_speed.speed_72mhz.build.f_cpu=72000000L
genericSTM32F103C.menu.cpu_speed.speed_48mhz=48Mhz (underclock)
genericSTM32F103C.menu.cpu_speed.speed_48mhz.build.f_cpu=48000000L
genericSTM32F103C.menu.cpu_speed.speed_96mhz=96Mhz (overclock)
genericSTM32F103C.menu.cpu_speed.speed_96mhz.build.f_cpu=96000000L

Next, the flash wait state is manipulated. If lower CPU speed is wanted, the flash states can be reduced in "/variants/[your_board]/wirish/boards.cpp".
For BP, I just replaced line 104 by the following lines:

Code: Select all

#if F_CPU == 48000000
  flash_set_latency(FLASH_WAIT_STATE_1);
#else
  flash_set_latency(FLASH_SAFE_WAIT_STATES);
#endif

For speeds higher than 72 MHZ it seems that the boards are working fine with the default safe value of 2 wait states.
Last edited by stevestrong on Sun Jan 08, 2017 1:32 pm, edited 1 time in total.

racemaniac
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Re: Guide for under- and over-clocking the blue-pill needed

Postby racemaniac » Sun Jan 08, 2017 12:50 pm

i don't know if you've used stm32cubemx already, but if you haven't, you should download it :).
It's not only useful for generating code, but also gives great overviews of the microcontrollers. The interface has a seperate screen just for the entire clock configuration of the microcontroller you chose, and you can play around with the values and it'll show where there are conflicts, but also show the consequences of the values you chose (such as how the peripheral clocks change etc..)
It makes exploring the over/underclocking options of an stm32 a lot easier :). and then you also know which clock setting you have to set to what to achieve the result you configured in the cubemx :).

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Pito
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Re: Guide for under- and over-clocking the blue-pill needed

Postby Pito » Sun Jan 08, 2017 12:55 pm

My 103ZET6 (default ws):
Starting Whetstone benchmark...
Loops: 1000Iterations: 1Duration: 20366 millisec.
C Converted Double Precision Whetstones: 4.91 MIPS <<< 72MHz

Loops: 1000Iterations: 1Duration: 15250 millisec.
C Converted Double Precision Whetstones: 6.56 MIPS <<< 96MHz

Loops: 1000Iterations: 1Duration: 12201 millisec.
C Converted Double Precision Whetstones: 8.20 MIPS <<< 120MHz

Loops: 1000Iterations: 1Duration: 11438 millisec.
C Converted Double Precision Whetstones: 8.74 MIPS <<< 128MHz

Dhrystone Benchmark, Version 2.1 (Language: C) <<< 128MHz
Execution starts, 300000 runs through Dhrystone

Execution ends
Microseconds for one run through Dhrystone: 7.28
Dhrystones per Second: 137397.93
VAX MIPS rating = 78.20

stevestrong
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Re: Guide for under- and over-clocking the blue-pill needed

Postby stevestrong » Sun Jan 08, 2017 2:32 pm

Should flash wait states have an effect on GPIO toggling speed?
Because I tried to toggle one GPIO pin at different flash wait states (0, 1 and 2) here.
The result: no change!

Is this normal?
What am I doing wrong?

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Pito
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Re: Guide for under- and over-clocking the blue-pill needed

Postby Pito » Sun Jan 08, 2017 4:42 pm

It could happen when the core uses cache or a multi-stage-pipeline and your toggle insts are close together.
Not sure it happens with 103, however

stevestrong
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Re: Guide for under- and over-clocking the blue-pill needed

Postby stevestrong » Sun Jan 08, 2017 5:24 pm

I am assuming that the GPIOs are directly driven by the CPU core, as I could not detect any clock group which would be supposed to drive the GPIO pins. And as long the CPU executes the instructions dependent on the core clock and the flash wait states, I would expect to have different GPIO toggle periods for different wait states.
But somehow my theory seems to be wrong.

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Pito
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Re: Guide for under- and over-clocking the blue-pill needed

Postby Pito » Sun Jan 08, 2017 6:34 pm


stevestrong
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Re: Guide for under- and over-clocking the blue-pill needed

Postby stevestrong » Sun Jan 08, 2017 6:58 pm

Yes, it does discuss the toggling at no setting and 2 flash wait states. The difference is about 20%.

Me, I cannot observe any difference in behavior between wait states 0, 1 and 2, I always get ~12MHz at 48MHz CPU, that's my problem here...
I doubt now whether the flash wait states are indeed set as I expect.
Last edited by stevestrong on Sun Jan 08, 2017 7:13 pm, edited 1 time in total.


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