Remap PB2

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stevestrong
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Re: Remap PB2

Post by stevestrong » Wed Feb 22, 2017 3:20 pm

Thanks for this finding, I have now corrected it in my repo.
https://github.com/stevstrong/Adafruit_ ... M32.h#L153
You could simply insert in line 153 of the header file following line:

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extern uint32_t readReg32(uint8_t r);

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efftek
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Re: Remap PB2

Post by efftek » Thu Feb 23, 2017 4:44 pm

@Stevestrong

Thanks for the update, I can now build and upload the code however, th screen remains white. I have several different screens, all of which work on the UNO/Mega2560 using mcufriend_kbv. I had hoped one would work with this driver. The screen I'd really lke to get working is an MCUFRIEND 3.95" SPI+8 bit withe ILI9488.

Now, I noticed in the header file you ammended that the TFT_RST was on PB8 (see below) when I was sure I had read it should be on PA4 however, I tried both with no success. It's getting verry frustrating not having a screen working with the 'pill' when they work with the Arduinos and I really want to be moving up to STM32duino's instead.

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#define TFT_DATA       GPIOB
// Port data bits D0..D7:
// enable only one from below lines corresponding to your HW setup:
#define TFT_DATA_NIBBLE	0 // take the lower 8 bits: 0..7
//#define TFT_DATA_NIBBLE	8 // take the higher 8 bits: 8..15

//Control pins |RD |WR |RS |CS |RST|
#define TFT_CNTRL      GPIOA
#define TFT_RD         PA0
#define TFT_WR         PA1
#define TFT_RS         PA2
#define TFT_CS         PA3
#define TFT_RST        PB8 //PB0
Also, I was wondering, if I edited the file to read as follows, would that be all I need to do to remove the problem of not having PB2 (ie moving the data lines to PORTA and putting the CTRL lines on PORTB at B3 - B7) or would I also need to edit other files too?

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#define TFT_DATA       GPIOA
// Port data bits D0..D7:
// enable only one from below lines corresponding to your HW setup:
#define TFT_DATA_NIBBLE	0 // take the lower 8 bits: 0..7
//#define TFT_DATA_NIBBLE	8 // take the higher 8 bits: 8..15

//Control pins |RD |WR |RS |CS |RST|
#define TFT_CNTRL      GPIOB
#define TFT_RD         PB3
#define TFT_WR         PB4
#define TFT_RS         PB5
#define TFT_CS         PB6
#define TFT_RST        PB7
I'd appreciate your input.

Regards

Steve F.

stevestrong
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Re: Remap PB2

Post by stevestrong » Thu Feb 23, 2017 6:20 pm

Steve, to test the data and control lines I strongly recommend to use first the LCD_ID_readreg.INO sketch from David Prentice.
Just adapt the pins you have wired, using PXY notation (e.g. PA3).
I was using it as well to debug my setup, and could successful correct my errors based on that.
You could maybe post here the log output.

And yes, those changes should suffice.

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efftek
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Re: Remap PB2

Post by efftek » Thu Feb 23, 2017 8:46 pm

WP_20170223_20_17_07_Pro.jpg
WP_20170223_20_17_07_Pro.jpg (213.93 KiB) Viewed 248 times
SteveStrong, Thanks for your reply (and your patience)

So, I ran the code on the STM32 mini board which was connected as in the pic above. The pin settings were as follows;

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#define LCD_RST PB8
#define LCD_CS  PB7
#define LCD_RS  PB6
#define LCD_WR  PB5
#define LCD_RD  PB4

#define LCD_D0  PA0
#define LCD_D1  PA1
#define LCD_D2  PA2
#define LCD_D3  PA3
#define LCD_D4  PA4
#define LCD_D5  PA5
#define LCD_D6  PA6
#define LCD_D7  PA7
These are the results I got

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Read Registers on STM32duino
controllers either read as single 16-bit
e.g. the ID is at readReg(0)
or as a sequence of 8-bit values
in special locations (first is dummy)

reg(0x0000) C0 C0	ID: ILI9320, ILI9325, ILI9335, ...
reg(0x0004) C4 C4 C4 C4	Manufacturer ID
reg(0x0009) C9 C9 C9 C9 C9	Status Register
reg(0x000A) CA CA	Get Powsr Mode
reg(0x000C) CC CC	Get Pixel Format
reg(0x0061) E1 E1	RDID1 HX8347-G
reg(0x0062) E2 E2	RDID2 HX8347-G
reg(0x0063) E3 E3	RDID3 HX8347-G
reg(0x0064) E4 E4	RDID1 HX8347-A
reg(0x0065) E5 E5	RDID2 HX8347-A
reg(0x0066) E6 E6	RDID3 HX8347-A
reg(0x0067) E7 E7	RDID Himax HX8347-A
reg(0x0070) F0 F0	Panel Himax HX8347-A
reg(0x00A1) E1 E1 E1 E1 E1	RD_DDB SSD1963
reg(0x00B0) F0 F0	RGB Interface Signal Control
reg(0x00B4) F4 F4	Inversion Control
reg(0x00B6) F6 F6 F6 F6 F6	Display Control
reg(0x00B7) F7 F7	Entry Mode Set
reg(0x00BF) FF FF FF FF FF FF	ILI9481, HX8357-B
reg(0x00C0) C0 C0 C0 C0 C0 C0 C0 C0 C0	Panel Control
reg(0x00C8) C8 C8 C8 C8 C8 C8 C8 C8 C8 C8 C8 C8 C8	GAMMA
reg(0x00CC) CC CC	Panel Control
reg(0x00D0) D0 D0 D0	Power Control
reg(0x00D2) D2 D2 D2 D2 D2	NVM Read
reg(0x00D3) D3 D3 D3 D3	ILI9341, ILI9488
reg(0x00DA) DA DA	RDID1
reg(0x00DB) DB DB	RDID2
reg(0x00DC) DC DC	RDID3
reg(0x00E0) E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0	GAMMA-P
reg(0x00E1) E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 E1	GAMMA-N
reg(0x00EF) EF EF EF EF EF EF	ILI9327
reg(0x00F2) F2 F2 F2 F2 F2 F2 F2 F2 F2 F2 F2 F2	Adjust Control 2
reg(0x00F6) F6 F6 F6 F6	Interface Control
Then I built the original code for the Arduino UNO, and ran it with the shield connected to a UNO and these are the results from that run

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Read Registers on MCUFRIEND UNO shield
controllers either read as single 16-bit
e.g. the ID is at readReg(0)
or as a sequence of 8-bit values
in special locations (first is dummy)

reg(0x0000) 00 00	ID: ILI9320, ILI9325, ILI9335, ...
reg(0x0004) 00 54 80 66	Manufacturer ID
reg(0x0009) 00 00 61 00 00	Status Register
reg(0x000A) 00 08	Get Powsr Mode
reg(0x000C) 00 06	Get Pixel Format
reg(0x0061) 00 00	RDID1 HX8347-G
reg(0x0062) 00 00	RDID2 HX8347-G
reg(0x0063) 00 00	RDID3 HX8347-G
reg(0x0064) 00 00	RDID1 HX8347-A
reg(0x0065) 00 00	RDID2 HX8347-A
reg(0x0066) 00 00	RDID3 HX8347-A
reg(0x0067) 00 00	RDID Himax HX8347-A
reg(0x0070) 00 00	Panel Himax HX8347-A
reg(0x00A1) 00 93 30 93 30	RD_DDB SSD1963
reg(0x00B0) 00 00	RGB Interface Signal Control
reg(0x00B4) 00 02	Inversion Control
reg(0x00B6) 00 02 02 3B 3B	Display Control
reg(0x00B7) 00 06	Entry Mode Set
reg(0x00BF) 00 00 00 00 00 00	ILI9481, HX8357-B
reg(0x00C0) 00 0E 0E 0E 0E 0E 0E 0E 0E	Panel Control
reg(0x00C8) 00 B0 B0 B0 B0 B0 B0 B0 B0 B0 B0 B0 B0	GAMMA
reg(0x00CC) 00 03	Panel Control
reg(0x00D0) 00 00 00	Power Control
reg(0x00D2) 00 00 00 00 04	NVM Read
reg(0x00D3) 00 00 94 88	ILI9341, ILI9488
reg(0x00DA) 00 54	RDID1
reg(0x00DB) 00 80	RDID2
reg(0x00DC) 00 66	RDID3
reg(0x00E0) 00 00 07 0C 05 13 09 36 AA 46 09 10 0D 1A 1E 0F	GAMMA-P
reg(0x00E1) 00 00 20 23 04 10 06 37 56 49 04 0C 0A 33 37 0F	GAMMA-N
reg(0x00EF) 00 00 00 00 00 00	ILI9327
reg(0x00F2) 00 58 04 12 02 22 22 FF 0A 90 14 88	Adjust Control 2
reg(0x00F6) 00 00 00 00	Interface Control
Hmm, they dont match. The UNO seems acceptable and the STM32 mini looks like crap!

Why would it not read the board registers correctly? Is it my 'pill', is it off colour, neither red nor blue? I'm blue, Im rapidly loosing hair and at 57 its already thinning!

Regards

Steve F

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efftek
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Re: Remap PB2

Post by efftek » Thu Feb 23, 2017 9:24 pm

UPDATE

I also connected the shield to a CZ miniSTM32F103VEK board using the same pins, Data on A0-A7 & CTRL on B3-B7.

I got the exact same result.

Steve F

stevestrong
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Re: Remap PB2

Post by stevestrong » Fri Feb 24, 2017 8:13 am

It is obvious that your connection from F103 board to display module is wrong, I can see it from the attached picture.

Be aware, that the data pins on the display board are not consecutively numbered. D0 and D1 are twisted and are placed on the other connector than D2..D7. At least I think so, because it is the case on my 2.4 inch TFT module.
Can you post here a picture of the back side of the board? Is it like this one?

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efftek
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Re: Remap PB2

Post by efftek » Fri Feb 24, 2017 9:19 am

Sorry SteveStrong, you dont catch me out that easy, the wires were twisted
wires.jpg
wires.jpg (184.48 KiB) Viewed 235 times
If only it was that easy!!

Steve.

stevestrong
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Re: Remap PB2

Post by stevestrong » Fri Feb 24, 2017 9:26 am

Well, I can see that violet (PA0) and grey (PA1) should be swapped on the display module - violet from PA0 is now connected with LCD_D1, which is wrong.

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efftek
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Re: Remap PB2

Post by efftek » Fri Feb 24, 2017 9:48 am

OK, I'll give you that one SteveStrong, that was an accident, they were supposed to be in order on the pill and twisted on the tft. however, now I have put that right, I still get the same results from the id_regread sketch!

Aaarghhhh!

stevestrong
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Re: Remap PB2

Post by stevestrong » Fri Feb 24, 2017 10:00 am

Which upload method are u using?
I remember, there are some pins (including PB4) which only work if some define is active, dependent on some upload method (it is related to debug port, if you search the forum for "PB4" you will have something to read about).
I think the solution is to remove "-DCONFIG_MAPLE_MINI_NO_DISABLE_DEBUG=1" from boards.txt line 193.
As an alternative, I would suggest to use any other (PB_0/1/9/10/11 ?) pin instead PB4 (which is connected to RD control signal - critical for reading!).

Write a short test sketch just to toggle each of the used pins (both data and control) with an external LED connected (or check with a scope).

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