F3 CCM ram usage.

Limited support for STM32F3 based boards, e.f STM Discovery and Nucleo line
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victor_pv
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Joined: Mon Apr 27, 2015 12:12 pm

F3 CCM ram usage.

Post by victor_pv » Mon Apr 24, 2017 1:37 pm

I don't know who is using the libmaple core in F3 MCUs, but for those doing it.
I am currently working on the F4 core, and using the CCM memory to store some variables is already giving a performance bump.
In the F3 the ccm memory is smaller, but better than the F4 since it can execute code from it (the F4 can't run code from CCM ram.

If anyone is using the F3 and needs help getting the linker scripts modified to use CCM let me know and I will help what I can from what I am learning with the F4.

The things that would benefit the most from using CCM are:
  • NVIC table. The flash is fast when doing sequential access, but having to read the nvic to service an interrupt needs several wait states. Read from ccm is always 0 wait states.
  • ISRs. When the MCU has to jump from normal code to an ISR, is again disupting sequential run of the code and having to read at a different place, which again cost several wait states. When the ISR finishes and has to return to normal program flow, again has to jump and wait several wait states.
  • Any other routine that gets called a whole lot and is short.
With normal code in flash and NVIC and ISR in ccm you faster servicing of interrupts on entry, and again on exit since the flash buffer still contains the prefetch for the next instructions in main code when the ISR exit.

This may not be much, but for anything where jitter has a negative effect, it should help bringing it down.

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