Any Parallel in Binary Sizesf IDE for Board Created to Standard PC Binary?

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keypunch
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Any Parallel in Binary Sizesf IDE for Board Created to Standard PC Binary?

Postby keypunch » Tue Oct 25, 2016 10:28 am

I have been creating code that gives me an idea as well as builds the base for what will end up in a "board" of some type. I know the code I compile for Linux for example will not be exactly 100% the code for the board, but the parts that are different will be about 20% or less I suspect.

My question is if source Y gives a binary size X how will binary size X compare when compiled for a "board"? Exact numbers are no needed. I am looking for if X on say Linux with gcc will the "board" binary be about same as X or 50% less or 150% more as example of the sense I like to have. I know libraries are a big factor and the granularity (not not) of libraries can be a major factor to fnial binary size.

Oh how much I miss the days of binaries that did not have libraries linked in and not the mess of shared libraries. Oh well. Some of us go back a "while". Does anyone actually know what core memory is?

Regards

John L. Males
Toronto, Ontario
Canada
25 October 2016 06:29

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mrburnette
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Re: Any Parallel in Binary Sizesf IDE for Board Created to Standard PC Binary?

Postby mrburnette » Tue Oct 25, 2016 12:48 pm

John,

Arduino is just a GUI on top of a bunch of messy scripts that happen behind the scenes. The underlying compiler and linker will produce the same chip binary regardless of the OS; therefore, OS-x, Linux, and Windows will produce the same blink binary file that gets loaded to the microcontroller. When you have a sketch in the GUI editor and click on the upper-left Check-Mark, you will be shown the binary size of the file which is what gets loaded to the board specified. Compiling the same sketch for another microcontroller and the binary will most assuredly be a different size. The binary size represents the storage required in the 'flash' part of the microcontroller: for an Atmega328P chip, the flash is in the chip and for and ESP8266 chip the flash is an external chip.

Installation of the IDE and the GCC compiler/linker provides tools that will allow you to actually "look" at the assembly code that represents the binary file. Check out this article: https://ucexperiment.wordpress.com/2012/02/21/arduino-assembly-language-listing-of-compiled-sketch-windows/


Good luck,
Ray
Ray's Projects
PS: I've actually worked with paper tape! Life has been one hell of a technological ride!

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Rick Kimball
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Re: Any Parallel in Binary Sizesf IDE for Board Created to Standard PC Binary?

Postby Rick Kimball » Tue Oct 25, 2016 2:00 pm

I found this interesting site on the net called the "Compiler Explorer" it might be just what you are trying to find:

https://gcc.godbolt.org/

It allows you to easily compare the compiler output of various machine architectures and versions of gcc. You might try taking some code and select the gcc x86, then do the same for arm cortex-m3. Maybe then you can give us the magic multiplier.

What I find most interesting is the wide range of results depending on the version of the gcc compiler used and which optimization options selected. You can create some really large crappy code or some extremely optimal results if you pick the right command line args.

-rick
Last edited by Rick Kimball on Tue Oct 25, 2016 6:59 pm, edited 1 time in total.
-rick

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martinayotte
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Re: Any Parallel in Binary Sizesf IDE for Board Created to Standard PC Binary?

Postby martinayotte » Tue Oct 25, 2016 4:06 pm

Interesting !!!

keypunch
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Re: Any Parallel in Binary Sizesf IDE for Board Created to Standard PC Binary?

Postby keypunch » Tue Oct 25, 2016 9:39 pm

First I wish to say sorry for my typo in the subject of thread name. If there is way to edit let me know.

Ray,

Thanks for your reply. While wondering about after my post I happened on the command-line stm32duino thread. Tiger762 really put in not just alot of effort to figure matters out, but the time and detail of the information was enlightning. As these microcountrolers and how source is build to make a binary is new to me it will take a bit for me to digest. I have not used any microcontroler yet. I have one here, Nano waiting for a prototype board. A Lenoard on way (I need lots of ADC pins, not ADC but you loose for SPI FD, I2C, et al as you all know about and based on MCU). So I have never even downloaded a MCU IDE, or Arduino yet.

Your point that the binary goes in the flash was interesting. I am assuming the binary has to run in RAM? Correct? If not that likely plays to the Flash/RAM sizing I am trying to determine. Flash/RAM sizing aside, CPU processing power is starting to look like a need for this important personal project. The proof of concept was last year about this time with me teathered to a 70foot RJ11 cable connected to a Thin Terminal running the software I have had and heavily modifided/enhanced since 2006. Memory/Processing power was not issue, but there is more need for what the device will need to do which brings up STM32 processing power. I know a Adafruit Father will draw about 12ma (was tested and published by Adafruit) for SD card writing. What I yet to figure out is if a STM32 will be similar. Device needs to be able to last at least 6-7 days on battery before another charge. Battery design translates to 3 days before charge so do not deep cycle battery.

The reason I asked about binary sizing and if anyone has seen a "magic multiplier" term Rick noted is knowing thre can be differences in size just on the CPU architecture alone exclusice of libraries, compilter options used for source and libraries, et al . I have seen many times with many different compilers (not just C) wide difference in code size not just for same source, but even a simple same net logic or for a exact same data type different code. Different so much to be way way different, as in several K to hundred MB different. I also know most C compilers have some basic flaws that have existed for years that a 10 line assember program does not have for exact same thing with regards to basic memory 101 of the Paper Tape days that is still true to this day. Such issues, bugs and assumptions in compiler design should not exist, not should I have to write a 10-30 line assembler program to avoid the basic compiler memory 101. Code generation/sequencing, well that is whole different discussion. In last few days I have hit some any compiler bugs just wring code and not testing (I did testing for years, compilers as well at personal level, agmonst my varied experiences).

I am familar with the assembler output GCC and some other compilers can generate. I started in IT as my first language being assembler and first personal project task to disassemble the OS and Compilers/Assembler manually to make major changes. The first goal for the IBM OS was an assember program to write a sysgen for the IBM systm to run in 30-40 minutes not the 4 hours IBM way. From scratch in assember as first entrance to computers. This means your link to the web pages about the assembler outpit to look at and maybe change I have done, but not for some time. Most are issues with Open Source so the "source be with you" does not need one to look at the assembler except when ones nose says something stinks.

I think you would agrees that despite Paper Tape days much has not really changed in many basic ways. Some things are coming full circle to those days. And yes I remember Paper Tape and even 026 Keypunch machines that used Vaccum tubes/Valves, relays and no transistors. At least you cannot "spill" Paper Tape. Lets just say there was a incident in parking lot to another site to do work where card trays of assembler programs spilled to the loading dock. Translate to how dinner was spend as friend's mother made diner for us afterwards.

I need to digest the command-line stm32duino, your reply, and some of the things you have done I have looked at over last few months via various links on this site and from the links thereafter. Very interesting reading for sure and lots of practical reasoning as well. Once I get past the i2c issue or few pestering in code 98% ready then I can look at the cross cross compiling. If I can do this and make some 32 bit binaries needed then that helps all. I may be distracted again as someone wants me to test two different applications. Progress as I am testing and educating why testing is done way is done. I am sure you know that drill very well and the time it takes vs what many think takes.


Regards,

John L. Males
Toronto, Ontario
Canada
25 October 2016 16:50 - 17:40
Opps, Famous jlm typos needed correction 25 October 2016 17:51
Last edited by keypunch on Tue Oct 25, 2016 9:51 pm, edited 1 time in total.

keypunch
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Re: Any Parallel in Binary Sizesf IDE for Board Created to Standard PC Binary?

Postby keypunch » Tue Oct 25, 2016 9:48 pm

Rick,

The https://gcc.godbolt.org/ you provided in your reply is very interesting. Really interesting. I have to look more closely. As you know bit width size and RISC VS Complex based machine architectures does not mean less assember instructions is smaller code nor faster or slower. There are many other factors to code size and speed of the code as you know. Still this is one of most intersting sites to see in regards to code results. Code I write I likely cannot plug in, but I can find sample code similar to do a compare. Better to do compare on blocks/functions level and sum the parts as parts are used in their combinations. One can see impact of compiler version and coding techniques to figure sizing impacts. Sadly library impact is not part of and a major factor in finial code size.


Regards,

John L. Males
Toronto, Ontario
Canada
25 October 2016 17:49

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martinayotte
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Re: Any Parallel in Binary Sizesf IDE for Board Created to Standard PC Binary?

Postby martinayotte » Tue Oct 25, 2016 9:52 pm

Your point that the binary goes in the flash was interesting. I am assuming the binary has to run in RAM? Correct?

No, the code is execute directly from flash.

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RogerClark
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Re: Any Parallel in Binary Sizesf IDE for Board Created to Standard PC Binary?

Postby RogerClark » Tue Oct 25, 2016 10:08 pm

martinayotte wrote:
Your point that the binary goes in the flash was interesting. I am assuming the binary has to run in RAM? Correct?

No, the code is execute directly from flash.


There used to be an option to run from RAM but we removed it, as even a simple sketch like Blink took 90% of available RAM, so it was unusable for any real world project.

keypunch
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Re: Any Parallel in Binary Sizesf IDE for Board Created to Standard PC Binary?

Postby keypunch » Wed Oct 26, 2016 1:28 am

RogerClark wrote:
martinayotte wrote:
Your point that the binary goes in the flash was interesting. I am assuming the binary has to run in RAM? Correct?

No, the code is execute directly from flash.


There used to be an option to run from RAM but we removed it, as even a simple sketch like Blink took 90% of available RAM, so it was unusable for any real world project.


Makes sense to run code from flash, hence remove option to run from RAM. Amazed blink would be the threshold of how much of RAM is used. I was never certain and never researched to find out yet. I assume somehow the code knows when to use RAM for variables I assume. Part of my sizing still is sigificant in variables used. It will be a easier to size own code based on my code variables use/size. What I will not be able to account for is library variable use/sizing. I will figure some of this out once I have a MCU I can use and try out such things. No worries to fill in the blanks as I am sure I will figure out or find answer with some searching. My OP question was to figure out the binary size as Rick called it the "magic multiplier" for given pair. Having that wuold give me a sizing reference to use to as part of criteria of MCU selection.


Regards,

John L. Males
Toronto, Ontario
Canada
25 October 2016 21:29

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Rick Kimball
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Re: Any Parallel in Binary Sizesf IDE for Board Created to Standard PC Binary?

Postby Rick Kimball » Wed Oct 26, 2016 2:40 am

keypunch wrote:My OP question was to figure out the binary size as Rick called it the "magic multiplier" for given pair. Having that wuold give me a sizing reference to use to as part of criteria of MCU selection.


You can use the size command to see the sizes. The ROM will contain the .text, .data, and .rodata sections. The RAM will contain the .data and .bss sections.

# compile for pc linux
$ gcc -Os -o foo.elf foo.cpp and all the other args
$ size -A foo.elf

# compile for arm cortex-m3
$ arm-none-eabi-gcc -Os -mthumb -mcpu=cortex-m3 -o foo.elf foo.cpp and all the other args
$ arm-none-eabi-size -A foo.elf

...
[Edit]
I tried this with some code I had lying around ...

Code: Select all

# try PC code
$ gcc -Os -c ringbuffer.c
$ size ringbuffer.o
   text      data       bss       dec       hex   filename
   1159         0         0      1159       487   ringbuffer.o

# try cortex-m3 code
$ arm-none-eabi-gcc -Os -mthumb -mcpu=cortex-m3 -c ringbuffer.c
$ arm-none-eabi-size ringbuffer.o
   text      data       bss       dec       hex   filename
    763         0         0       763       2fb   ringbuffer.o
 


So with this very small sample set the magic multiplier is about ~.666 seems evil to me
[/Edit]


-rick
-rick


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