GPIO macros for CubeMX

Development of new Cores using the STMCubeMX and HAL
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Joined: Thu Feb 25, 2016 7:27 pm

GPIO macros for CubeMX

Post by Ollie » Sat Oct 21, 2017 4:45 pm

My IDE tool has been EmBitz and that has restricted the development to Standard Peripheral Library. I have tried several non-STMicroelectronics libraries, but with disappointments. In practice, I have now ended in STM32CubeMX with tight integration with EmBitz.

The HAL and LL API calls for GPIO felt inefficient and too verbose. For that reason, I have ended in using only macros for GPIO access. In CubeMx you can define that user label BoardLED is used for pin PC13. This will then generate the following two lines in main.h file

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#define BoardLED_Pin GPIO_PIN_13
#define BoardLED_GPIO_Port GPIOC
This, all other user labels, and unlabeled GPIO pins can then be used for I/O with the following macros

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#define GPIO_read(_name_)           ((_name_##_GPIO_Port->IDR) & (_name_##_Pin))
#define GPIO_set(_name_)            _name_##_GPIO_Port->BSRR = (_name_##_Pin)
#define GPIO_clr(_name_)            _name_##_GPIO_Port->BSRR = ((_name_##_Pin) << 16)
#define GPIO_write(_name_,_value_)  \
  if (_value_) {GPIO_set(_name_);} \
  else {GPIO_clr(_name_);}
#define GPIO_toggle(_name_) GPIO_write(_name_,!GPIO_read(_name_))
For example, the blue LED can be toggled with the following line

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It is bothering me, to see so many GPIO libraries to use the read-modify-write operation for toggling. In real life applications, this works close to 100 % of the time, but not 100 % of the time. The right way is to use the BRR and BSRR registers for that as they have the right synchronization capability. I didn't use the BRR register in my macros because STM is not supporting that for all Fx, Hx, and Lx families. The 16 bit shift operation allows BSRR to be used as BRR.

Posts: 146
Joined: Wed May 11, 2016 4:29 pm

Re: GPIO macros for CubeMX

Post by dannyf » Tue Nov 14, 2017 11:59 pm

I use a set of gpio routines in a similar fashion:

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#define IO_SET(port, pins) port->OUT |= (pins)
#define IO_CLR(port, pins) port->OUT &=~(pins)

or on cpus that allow atomic gpio operations, I use the following:

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#define FIO_SET(port, pins) port->BSRR = (pins)
#define FIO_CLR(port, pins) port->BRR = (pins)

and then optionally remap IO_SET/CLR to FIO_SET/CLR

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#define IO_SET(port, pins) FIO_SET(port, pins)
#define IO_CLR(port, pins) FIO_CLR(port, pins)
It is bothering me, to see so many GPIO libraries to use the read-modify-write operation for toggling
nothing to get too worked up on something as trivial as rmw: trillions of lines of code have worked successfully and reliably before the invention of single-instruction gpio modules, and more will continue to work so, as long as programmers are careful and competent. you can never write 100% fool-proof code so no point in trying.

Posts: 193
Joined: Thu Feb 25, 2016 7:27 pm

Re: GPIO macros for CubeMX

Post by Ollie » Wed Nov 15, 2017 5:36 pm

You are correct that many of these read-modify-write problems can be dormant for a very long time and in sometimes dormant forever.

What is bothering me, that it has taken some time for STM has some difficulties to get the register names right.
  • F1 has 16 bit registers BSRR and BRR.
  • F4 has only a 32 bit registers BSRR.
  • H7 has 16 bit registers BSRRL and BSSRH.

The STM32H743 register names are the worst because there is no mnemonics about the meaning. How a developer should know that the Low is for setting a pin to 1 (high) and High is for setting pin to 0 (low). The memory address location is totally irrelevant for a developer. The F4 BSRR is at the offset 0x18, the H7 BSSRL is at 0x18 and BSSRH is at 0x1A. Better names for these locations would be BSET and BCLR.

PS. The 400 MHz Nucleo H7 is really fast and the price ($23) is reasonable.

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Re: GPIO macros for CubeMX

Post by stevestrong » Wed Nov 15, 2017 7:21 pm

As a small note, the F4 BSRR register can be accessed either as 32 bit or you could divide it as for F7 like BSRRL/H and accessing it in 16 bit mode.

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Re: GPIO macros for CubeMX

Post by zmemw16 » Wed Nov 15, 2017 10:22 pm

so conversely for H7, could you read it as a 32bit reg ?
what are the offsets for F1 and then the same question :) just checked rm0008 - ugh

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