stevestrong wrote:The funny part is, some of the graphicstests (text, lines and all outlines, where many single pixel writes take place) runs better with lower SPI clock but higher CPU frequency, than vice versa. OTOH, obviously, large block fillings are faster with higher SPI clock, where the CPU frequency does not really count.
So it really depends on the application, which variant one should use.
stevestrong wrote:The higher the SPI clock, the longer the delay so that the self-generated WR signal by the 4040 chip is shifted too much relative to the output of the 8 bit serial->parallel shifting 4094 chips. This timely mismatch causes actually the trouble above 24MHz. I could maybe try to replace only the 4040 chip by a faster one, and see what happens.
david.prentice wrote:In other words, you would either use a faster shift register (or slower counter).
Or deliberately delay the 4040 by an extra 10ns through gates or RC.
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