Hardware SPI

Working libraries, libraries being ported and related hardware
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BennehBoy
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Hardware SPI

Post by BennehBoy » Fri Feb 03, 2017 12:00 pm

So having upgraded from Arduino Nano to STM32 (Maple Mini clone), I find myself in the ridiculous position of having consumed all the available pins for the devices and analogue sensors that I want to connect.

One issue which I had previously encountered on Nano was that I was having to use 2 separate software SPI buses to get SSD1306 & MAX31586 devices to work - this is because the 2 software implementations in the respective adafruit libraries would not coexist on the same software SPI bus.

For whatever reason I never thought to try them both on the same HW SPI bus (principally because I did not at that time appreciate that SPI could be done in HW on the device - I'm a n00b).

Now that I realise I can use HW SPI I want to refactor my code & hw to use a single HW SPI bus.

Questions:

1) I take it there's no issues from a core perspective with me having multiple devices on a HW SPI bus on STM32, ie I just need a CS pin for each device?

2) The below reference for Maple Mini clones shows SPI1 as being exposed over 2 sets of pins, PB5, PB_4, PB_3, PA_15 and PA_4, PA_5, PA_6, PA_7 - the hardware doesn't duplicate the SPI bus on the second set of pins does it? This would defeat the purpose of what I'm trying to achieve.

Image

Thanks.
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stevestrong
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Re: Hardware SPI

Post by stevestrong » Fri Feb 03, 2017 12:21 pm

BennehBoy wrote: 2) The below reference for Maple Mini clones shows SPI1 as being exposed over 2 sets of pins, PB5, PB_$, PB_3, PA_15 and PA_4, PA_5, PA_6, PA_7 - the hardware doesn't duplicate the SPI bus on the second set of pins does it?
There are two different hardware implemented SPI interfaces (SPI1 and SPI2), so no duplicates.
BennehBoy wrote: 1) I take it there's no issues from a core perspective with me having multiple devices on a HW SPI bus on STM32, ie I just need a CS pin for each device?
In general no issue if you use different CS pins for each device, but depends on the hardware requirements of the SPI signal (there are 4 modes). Best would be if you can use the same SPI clock frequency, mode and data width for all devices connected to each SPI port in part.
But not mandatory. You can use 2 devices connected to SPI1 with 18MHz clock, MODE0 and DATA_WIDTH_16BIT and other 3 devices with 9MHZ, MODE2, DATA_WIDTH_8BIT, for example. This is possible because the SPI lib supports "SPIx.beginTransaction(SPISettings([param1], [param2]...);", where you can specify those parameters before communicating with each device in part. The number of connected devices is limited by the free GPIO pins usable for the CS signals.

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BennehBoy
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Re: Hardware SPI

Post by BennehBoy » Fri Feb 03, 2017 12:28 pm

Thanks Steve.

In relation to your first answer, why does the reference diagram show SPI1 exposed on 2 different sets of pins? Is this a config time option or just an error?

Fortunately the SSD's and the MAX both use MSBFIRST and SPI_MODE0 - the two libraries are clocked significantly differently though, 8000000 & 500000 - I'm not even sure those speeds are achievable? clock divisor of 9 and 144 respectively? OR does it not work that way.

The other SPI device I'd like to add is an SD card reader - I'll have a look at SDFAT to see how that would play.
Last edited by BennehBoy on Fri Feb 03, 2017 12:50 pm, edited 1 time in total.
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zmemw16
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Re: Hardware SPI

Post by zmemw16 » Fri Feb 03, 2017 12:33 pm

spi1 is PA4-PA7
spi2 is PB12-PB15

PA4 & PB12 being the CS line, naming sequence is the same and is cs, sck, miso and mosi

for multiple devices on SPI1, the PA5-PA7 lines are common to all, each device has its own CS, PA1,PA2,PA3 i tend to use as
CS, D/C and RES
PA4 needs to be set as an output and high, similar i suppose to the AVR SS line aka pin 10 ( not sure if still true ?? historical)

my system unit has an A4 sheet with SPI1, SPI2, I2C1 and I2C2 pins listed in very large font :)

stephen time crossed again

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BennehBoy
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Re: Hardware SPI

Post by BennehBoy » Fri Feb 03, 2017 12:49 pm

Thanks,

So I should ignore that first reference to SPI 1 being on PB5, PB_4, PB_3, PA_15.
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stevestrong
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Re: Hardware SPI

Post by stevestrong » Fri Feb 03, 2017 12:50 pm

PA15, PB3..5 are the alternate remapping pins of SPI1 from PA4..7, see RM0008, chapter 9.3.10, SPI1 alternate function remapping.
So yes, just ignore it, or use it if you need PA4..7 for other purpose.

In the same manner USART1 pins can be remapped from PA9/10 to PB6/7.

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BennehBoy
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Re: Hardware SPI

Post by BennehBoy » Fri Feb 03, 2017 1:05 pm

stevestrong wrote:PA15, PB3..5 are the alternate remapping pins of SPI1 from PA4..7, see RM0008, chapter 9.3.10, SPI1 alternate function remapping.
So yes, just ignore it, or use it if you need PA4..7 for other purpose.
OK, I'm currently using PA_4 as an analogue input but I can shift that to PB_0 and move the piezo buzzer from that pin to one of the PWM's that I free up.

Excellent. Thanks guys.
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zmemw16
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Re: Hardware SPI

Post by zmemw16 » Fri Feb 03, 2017 1:40 pm

stevestrong wrote:PA15, PB3..5 are the alternate remapping pins of SPI1 from PA4..7, see RM0008, chapter 9.3.10, SPI1 alternate function remapping.
So yes, just ignore it, or use it if you need PA4..7 for other purpose.

In the same manner USART1 pins can be remapped from PA9/10 to PB6/7.
i have pa15,pb3..pb5 as spi3, might be that i've mainly got vet/zet/zgt boards, also that remap means no i2c1 :)
i suppose i2c1 can also be alternate remapped elsewhere as well :D

stephen

stevestrong
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Re: Hardware SPI

Post by stevestrong » Fri Feb 03, 2017 2:02 pm

BennehBoy wrote:OK, I'm currently using PA_4 as an analogue input but I can shift that to PB_0 and move the piezo buzzer from that pin to one of the PWM's that I free up.
Actually, if you use SPI1 only in master mode, than you don't need to "remap" PA4 by AFIO register, because PA4 (=chip select signal) is used anyway as normal GPIO in output mode. So you are free to select any other free GPIO as CS instead of PA4.

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Re: Hardware SPI

Post by BennehBoy » Fri Feb 03, 2017 3:17 pm

stevestrong wrote: Actually, if you use SPI1 only in master mode, than you don't need to "remap" PA4 by AFIO register, because PA4 (=chip select signal) is used anyway as normal GPIO in output mode. So you are free to select any other free GPIO as CS instead of PA4.
Even better :D
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