I can confirm that it works as well on my G0:
Code: Select all
//unlock the domain
//on some chips, it requires a set of magic numbers
#define bkpUnlock() do {PWR->CR1 |= PWR_CR1_DBP;} while (!(PWR->CR1 & PWR_CR1_DBP)) //1->enable write assess, 0->disable write assess
#define bkpLock() do {PWR->CR1 &=~PWR_CR1_DBP;} while ( (PWR->CR1 & PWR_CR1_DBP)) //1->enable write assess, 0->disable write assess
//reset the tamper to use the backup registers
void bkpInit(void) {
//set dbp bit in pwr
RCC->APBENR1 |= RCC_APBENR1_PWREN | RCC_APBENR1_RTCAPBEN; //1->enable clock to pwr, 0->disable clock to pwr
RCC->BDCR |= RCC_BDCR_RTCEN; //enable RTC clock
//PWR->CR1 |= PWR_CR1_DBP; //1->enable write assess, 0->disable write access
}
//read backup register: 0..4 on G030
#define bkp0Get(n) (TAMP->BKP0R) //read bkp0
#define bkp0Set(val) do {bkpUnlock(); TAMP->BKP0R = (val); bkpLock();} while (0) //write bkp0
#define bkp1Get(n) (TAMP->BKP1R) //read bkp1
#define bkp1Set(val) TAMP->BKP1R = (val) //write bkp1
#define bkp2Get(n) (TAMP->BKP2R) //read bkp2
#define bkp2Set(val) TAMP->BKP2R = (val) //write bkp2
#define bkp3Get(n) (TAMP->BKP3R) //read bkp3
#define bkp3Set(val) TAMP->BKP3R = (val) //write bkp3
#define bkp4Get(n) (TAMP->BKP4R) //read bkp4
#define bkp4Set(val) TAMP->BKP4R = (val) //write bkp4
and in the user application:
Code: Select all
u2Print("bkp0 = ", bkp0=bkp0Get()); bkp0Set(bkp0Get() + 1); //READ_BIT back bkp0
across debug sessions (where the chip is reset), the value in bkp0/TAMP->BKP0R persisted.